Voltage controlled oscillator apparatus, method, and system

ABSTRACT

A voltage controlled oscillator includes two gain stages to split the bias current and reduce phase noise.

FIELD

The present invention relates generally to oscillator circuits, and morespecifically to voltage controlled oscillator circuits.

BACKGROUND

Voltage controlled oscillators (VCOs) provide a VCO output signal havinga frequency that varies based on a control signal. Voltage controlledoscillators may exhibit “phase noise,” which is a measure of how muchthe VCO output signal deviates from a pure sine wave at a singlefrequency.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a diagram of a voltage controlled oscillator havingisolated gate transistors;

FIG. 2 shows a diagram of a voltage controlled oscillator having bipolarjunction transistors;

FIG. 3 shows a diagram of a voltage controlled oscillator havingisolated gate transistors and bipolar junction transistors;

FIG. 4 shows a diagram of a circuit having gain devices with separatecurrent sources;

FIG. 5 shows a diagram of a frequency synthesizer;

FIG. 6 shows a system diagram in accordance with various embodiments ofthe present invention; and

FIG. 7 shows a flowchart in accordance with various embodiments of thepresent invention.

DESCRIPTION OF EMBODIMENTS

In the following detailed description, reference is made to theaccompanying drawings that show, by way of illustration, specificembodiments in which the invention may be practiced. These embodimentsare described in sufficient detail to enable those skilled in the art topractice the invention. It is to be understood that the variousembodiments of the invention, although different, are not necessarilymutually exclusive. For example, a particular feature, structure, orcharacteristic described herein in connection with one embodiment may beimplemented within other embodiments without departing from the spiritand scope of the invention. In addition, it is to be understood that thelocation or arrangement of individual elements within each disclosedembodiment may be modified without departing from the spirit and scopeof the invention. The following detailed description is, therefore, notto be taken in a limiting sense, and the scope of the present inventionis defined only by the appended claims, appropriately interpreted, alongwith the full range of equivalents to which the claims are entitled. Inthe drawings, like numerals refer to the same or similar functionalitythroughout the several views.

FIG. 1 shows a diagram of a voltage controlled oscillator (VCO) havingisolated gate transistors. Voltage controlled oscillator 100 includesinductor 110, varactors 120 and 130, isolated gate transistors 140 and150, and current source 160. Inductor 110 and varactors 120 and 130 forman LC tank circuit. Isolated gate transistors 140 and 150 are shown asN-type metal oxide semiconductor field effect transistors (MOSFETs)having source nodes coupled in common, and each has a gate node coupledto the other's drain node. This configuration of transistors is referredto herein as a “cross-coupled” pair of transistors.

Voltage controlled oscillator 100 provides an oscillating signal(V_(OUT)) on nodes 104 and 106 that varies in frequency as the controlvoltage (V_(CTL)) on input node 102 changes. The frequency of V_(OUT) isset generally by the resonant frequency of the tank circuit, which isset by the inductance of inductor 110 and the capacitance of varactors120 and 130, as well as other distributed reactive and resistiveelements throughout VCO 100. As the control voltage V_(CTL) is varied oninput node 102, the capacitance of varactors 120 and 130 changes, theresonant frequency of the tank circuit changes, and the frequency ofV_(OUT) changes.

Voltage controlled oscillator 100 also includes current source 160.Current source 160 sources a bias current I_(BIAS) that is provided tocross-coupled transistors 140 and 150. Values for I_(BIAS) and rationalefor setting I_(BIAS) are described below.

FIG. 2 shows a diagram of a voltage controlled oscillator having bipolarjunction transistors (BJTs). Voltage controlled oscillator 200 includesthe same LC tank circuit shown in FIG. 1, but includes cross-coupledbipolar junction transistors 240 and 250 in place of isolated gatetransistors 140 and 150. Voltage controlled oscillator 200 receives thecontrol voltage (V_(CTL)) on node 102, and produces an output signal(V_(OUT)) on nodes 204 and 206. Voltage controlled oscillator 200 alsoincludes current source 260 to source a bias current I_(BIAS) to thecross-coupled pair of bipolar junction transistors.

Voltage controlled oscillator 200 is referred to herein as a BJT VCO, inpart because the cross-coupled transistors are BJT transistors. Further,VCO 100 (FIG. 1) is referred to herein as a “MOSFET VCO” in part becausethe cross-coupled transistors in VCO 100 are shown as MOSFET devices.

As stated above, the MOSFET VCO and the BJT VCO each rely on a tuned LCtank circuit to control the frequency of oscillation. The tuned LC tankcircuit suffers from finite loss due in part to resistive losses in theinductor and varactors. Each type of VCO also includes a cross-coupledgain stage (also referred to as a “g_(m) stage”) to provide a “negativeresistance” that overcomes the effect of the tank circuit loss. The gainstage is referred to as a g_(m) stage in part because the negativeresistance is provided by the transconductance g_(m) of thecross-coupled transistors.

In general, the BJT has higher g_(m) for a given current and is wellsuited for high frequency applications. Accordingly, a large percentageof high performance VCOs are implemented as BJT VCOs. MOSFETs generallyhave a lower g_(m) and are better suited for lower frequencyapplications. Accordingly, MOSFET VCOs are generally used in lowerfrequency applications or in places where designers have no access toBJT technology.

Bias Current Considerations

Two different factors that may be considered to determine the bias levelof a VCO circuit are the “startup condition” and the “amplitudecondition.” These factors are described below along with theirapplication to BJT and MOSFET VCOs.

Startup Condition

One objective of the g_(m) stages is to simulate a negative resistanceto the tank elements that compensate for the tank loss. In someembodiments, the minimum g_(m) of the transistor, (g_(m min)), may beset to approximately three times higher than the total loss (g_(loss))of the tank elements:g _(m min)=3g _(loss)  (Eq. 1)

Where g_(loss) is equal to the reciprocal of the equivalent parallelresistance of the tank circuit. The 3× factor may be used to ensure thatunder process and temperature variations, the VCO circuit will alwayshave a higher g_(m) than the g_(loss) factor. Factors other than threemay also be used. If the VCO circuit has a higher g_(m) than theg_(loss), then the VCO will start to oscillate when power is applied.This is referred to herein as the condition for VCO startup.

Amplitude Condition

Given a fixed tank loss, increasing the VCO output signal amplitudereduces the phase noise of the VCO. The VCO signal amplitude (V_(OUT))is directly proportional to the bias current:V _(OUT) =I _(BIAS) /g _(loss)  (Eq. 2)

The manner in which g_(m) depends on bias current differs between BJTsand MOSFETs. For a BJT, g_(m) is directly proportional to the biascurrent:g _(mBJT) =I _(BIAS) /V _(t)  (Eq. 3)

where V_(t) is the thermal voltage. For a MOSFET, g_(m) has a weakerdependency on I_(BIAS):g _(mMos)=√{square root over (K·(W/L)·I _(BIAS))}  (Eq. 4)

where W=the width of the transistor and L=the length of the transistor.

In general, the square root factor applies to long channel devices whereI_(BIAS) has a quadratic dependence on bias voltage. For short channeldevices, this factor is even smaller translating to weaker currentdependency. The transistor W/L sizing factor may be used to increase theg_(m) of the device, however, increasing W/L increases the loadingcapacitance and hence restricts the VCO operating frequency.

Because of differences in the transistor types, a factor ofapproximately ten times higher g_(m) can be achieved using a BJT circuitversus a reasonably sized MOSFET circuit. Since BJTs generally have ahigher gain-bandwidth product (f_(t)) and a higher maximum frequency(f_(max)) than MOSFET transistors, their g_(m) frequency degradationfactor is much lower. This leads to an important observation in terms ofwhat sets the bias current upper bound for BJT VCOs versus MOSFET VCOs.In general BJT VCOs are bias limited by the VCO voltage swing condition(Eq. 2) and not the g_(m) startup condition (Eq. 1). Generally, BJT VCOsenjoy g_(m) factors that are much higher than the required g_(m min). Onthe other hand, the g_(m) of MOSFET VCOs has weaker current dependencywhere both the bias current and W/L are optimized to obtain g_(m min)while not degrading the operating frequency of the VCO.

Noise Considerations

Voltage controlled oscillators may be used in many differentapplications, including in receive and transmit paths of radio circuitsto down-convert or up-convert a modulated signal, respectively. Thisoperation is often referred to as “mixing” where in an ideal case theVCO is modeled as a pure single tone signal. In practice, however, theVCO signal power has a noise skirt in the frequency domain. The power inthis noise skirt is referred to as phase noise. Phase noise may bequantified in many ways, but is generally quoted in terms of dBc/Hz(phase noise in dB relative to the carrier amplitude per unit Hz) orNoise/Signal (N/S) per Hz.

Phase noise is generally undesirable. Decreasing phase noise may beachieved by 1) reducing the noise contribution of the VCO elementsand/or 2) increasing the signal level. Option 2 is directly related toincreasing the VCO bias current which results in higher power usage.Further, even if higher power usage is acceptable, the noise level ofthe VCO is positively correlated with the bias current, which reducesthe effectiveness of increasing the current/signal level.

The thermal noise of the g_(m) transistors is a major limiting factor tothe VCO phase noise. Thermal noise in a BJT is significantly differentthan in a MOSFET. For a BJT, thermal noise (shot noise) is directlyproportional to current:I _(cNoise) ²=2q·I _(BIAS)  (Eq. 5)

For a MOSFET, thermal noise is directly proportional to g_(m):I _(dNoise) ² =γ·kT·g _(mMOS)  (Eq. 6)

where γ is a correction factor with values between about 0.5 and 2.

Comparing equations 5 and 6 (and using equation 4 to calculate g_(mMOS)versus I_(BIAS)), shows that thermal noise in a BJT is much higher thanin a MOSFET at a given bias current.

Considering the fact that a high bias current for BJT was set to satisfythe voltage swing consideration (equation 2) and not the startupcondition (equation 1), this leads to high BJT phase noise. Anotherobservation to make is that the high bias current for the BJT VCOdictates a much higher g_(m) factor than what is required for the VCOstartup. On the other hand, a MOSFET VCO utilizes the minimum g_(m)requirement for startup and enjoys a lower phase noise (equation 6).

As described above, BJT VCOs suffer from high phase noise due to thedirect dependency of the thermal noise on bias current, and MOSFET VCOshave lower phase noise but suffer from low g_(m) and f_(t)/f_(max). Lowg_(m) and low f_(t)/f_(max) in MOSFETs translates to using higher biascurrents or limiting their use in high frequency applications.

Reducing Phase Noise

FIG. 3 shows a diagram of a voltage controlled oscillator havingisolated gate transistors and bipolar junction transistors. Voltagecontrolled oscillator 300 includes the tank circuit shown in FIGS. 1 and2, and also includes cross-coupled bipolar junction transistors 352 and354, and cross-coupled isolated gate transistors 362 and 364.Cross-coupled isolated gate transistors 362 and 364 are shown asMOSFETs. The cross-coupled BJTs are coupled to current source 350 whichprovides a current (a·I_(BIAS)), and the cross-coupled MOSFETs arecoupled to current source 360 which provides a current (1−a)(I_(BIAS)).The tank circuit has a current of I_(BIAS), which is equal to the sum of(a·I_(BIAS)) and (1−a)(I_(BIAS)). The “a” factor may be chosen to dividethe bias current between the two cross-coupled transistor pairs.

Voltage controlled oscillator 300 utilizes the strengths of both BJT andMOSFET transistors. By combining the cross-coupled BJTs withcross-coupled isolated gate transistors, the phase noise of theresulting VCO is reduced. The bias current provided by current source350 is set high enough for cross-coupled transistors 352 and 354 tosatisfy the startup condition. This draws on the strength of the BJT(higher g_(m)), but keeps the bias current through the BJTs no largerthan necessary, thereby reducing the phase noise contribution of theBJTs. Any desired output voltage swing is then achieved by providingadditional current using current source 360. The phase noisecontribution by the MOSFETs is kept small in part because the W/L factormay be kept small.

In some embodiments, the MOSFET stage is used to pass the majority ofthe bias current and reduce the BJT bias current and the BJT noisecontribution. Since the BJT stage is able to provide the requiredg_(m min), in some embodiments the g_(m) of the additional MOSFET stageis kept low by using the minimum W/L required to pass the remaining biascurrent. Hence, low noise is also obtained from this additional MOSFETstage as a result of having low g_(m) (even with its high bias current).The small W/L for the MOSFET stage also reduces capacitive loading onthe VCO tank circuit which reduces any shift in the oscillationfrequency caused by capacitive loading.

When designing a VCO such as VCO 300, I_(BIAS) and “a” may be determinedusing the startup condition and amplitude condition described above. Forexample, I_(BIAS) may be set by the desired output voltage swing, alsoreferred to as the “amplitude condition” (equation 2). Also for example,“a” may be selected such that the cross-coupled BJT transistors willpass the minimum required current to provide the startup g_(m min). Insome embodiments, this current may be approximately 1/10th of the totalbias current. This results in a lower thermal noise contribution made bythe cross-coupled BJTs (equation 5). In some embodiments, “a” may beincreased beyond the point at which the minimum current required forstartup is provided. For example, “a” may be increased to ensure thatthe startup condition is met over voltage and process variations.

The cross-coupled MOSFET transistors will pass the remaining biascurrent (1−a)(I_(BIAS)). The W/L sizing of the MOSFET transistors may beset to a much lower value since the MOSFETs are used to switch theremaining bias current to the tank, and not to provide the g_(m) for theVCO. This may also translate to a much lower thermal noise for theMOSFET devices (equation 6).

The isolated gate transistors shown in FIG. 3 are shown as N-type metaloxide semiconductor field effect transistors (NMOSFETs), and the bipolarjunction transistors are shown as NPN transistors. In some embodiments,P-type MOSFETS and PNP BJTs are utilized. In still further embodiments,other types of switching or amplifying elements may be utilized for thevarious transistors described herein, without departing from the scopeof the present invention.

The circuits described herein may be manufactured in many differentways. For example, in some embodiments, VCO 300 is manufactured in asilicon germanium (SiGe) process.

FIG. 4 shows a diagram of a circuit having gain devices with separatecurrent sources. In some embodiments, circuit 400 represents ageneralization of VCO 300 (FIG. 3). Circuit 400 includes load circuit410, first gain device 420, current source 422, second gain device 430,and current source 432. Load circuit 410 has a bias current I_(BIAS)passing through it, which is divided between first and second gaindevices, 420 and 430, respectively. Current source 422 provides a biascurrent (a·I_(BIAS)), and current source 432 provides a bias current(1−a)(I_(BIAS)).

Load circuit 410 may be any type of circuit that provides a load to thegain devices. Examples include, but are not limited to, active loads,tank circuits, or the like. In some embodiments, load circuit 410includes a tank circuit that includes inductors and variable capacitors.One example embodiment of load circuit 410 is shown in FIG. 3 havinginductor 110 and varactors 120 and 130.

First gain device 420 and second gain device 430 may have differentcharacteristics. By utilizing separate gain stages with differentcharacteristics, phase noise may be reduced. For example, first gaindevice 420 may have a higher transconductance than second gain device430. Also for example, first gain device 420 may have exhibit a phasenoise characteristic that shows a greater dependency on bias currentthan second gain device 430. By splitting the bias current between firstgain device 420 and second gain device 430, a desired amount of gain maybe achieved using a desired amount of bias current, while reducing phasenoise.

In some embodiments, first gain device 420 includes cross-coupledbipolar junction transistors, and in some embodiments, second gaindevice 420 includes cross-coupled isolated gate transistors. Manydifferent embodiments may exist having different combinations of gainelement types.

In some embodiments, circuit 400 implements a voltage controlledoscillator. In other embodiments, circuit 400 represents an oscillatorhaving a substantially fixed output frequency. In general, circuit 400may be any circuit with multiple gain devices that have differentcharacteristics.

FIG. 5 shows a diagram of a frequency synthesizer. Frequency synthesizer500 includes VCO 520, frequency prescaler 530, low pass filter (LPF)512, and compare circuit 510. In operation, compare circuit 510 receivesa reference signal on node 502, and an output signal from frequencyprescaler 530. Compare circuit 510 may compare phases of the two signalsor frequency of the two signals and produce an error signal. The errorsignal is received by LPF 512 which produces a VCO control signal. VCO520 receives the VCO control signal from LPF 512, and produces an outputsignal on node 504.

Voltage controlled oscillator 520 may produce an output signal that isgreater in frequency than the reference signal on node 502 in partbecause prescaler 530 divides the frequency of the output signal on node504. Voltage controlled oscillator 520 may be any of the VCO embodimentsdescribed herein, including one of the embodiments represented by VCO300 (FIG. 3) or circuit 400 (FIG. 4). Prescaler 530 may be any type ofsuitable prescaler, including a prescaler capable of dividing thefrequency of the VCO output signal by a variable amount.

FIG. 6 shows a system diagram in accordance with various embodiments ofthe present invention. System 600 includes frequency synthesizer 620,direct conversion receiver 610, and antenna 630. Frequency synthesizer620 may include any of the VCO embodiments described above. Further,frequency synthesizer 620 may be implemented using a circuit topologysimilar to that shown in FIG. 5.

Frequency synthesizer 620 may provide a local oscillator signal on node622, and direct conversion receiver 610 may receive a local oscillatorsignal at oscillator input port 612. Direct conversion receiver 610 mayalso receive a signal from antenna 630. Direct conversion receiver 610may utilize the local oscillator signal to “down-convert” the signalreceived from antenna 630 directly to baseband. Because directconversion receiver 610 does not utilize an intermediate frequency (IF),it may also be referred to as a “zero-IF” receiver.

In some embodiments, system 600 includes a transceiver that bothtransmits and receives signals at antenna 630. For example, system 600may be a cell phone with a transmitter and a receiver. Also for example,system 600 may be a wireless local area network interface that includesboth a transmitter and a receiver. In some embodiments, antenna 630 maybe a directional antenna, and in other embodiments, antenna 630 may bean omni-directional antenna.

Frequency synthesizers (and VCOs) may be used in systems other thansystems represented by FIG. 6. For example, a frequency synthesizer maybe used in a system that includes a heterodyne receiver that utilizes anintermediate frequency. Many other system uses exist for frequencysynthesizers and VCOs.

Voltage controlled oscillators, frequency synthesizers, cross-coupledtransistors, and other embodiments of the present invention can beimplemented in many ways. In some embodiments, they are implemented inintegrated circuits as part of electronic systems. In some embodiments,design descriptions of the various embodiments of the present inventionare included in libraries that enable designers to include them incustom or semi-custom designs. For example, any of the disclosedembodiments can be implemented in a synthesizable hardware designlanguage, such as VHDL or Verilog, and distributed to designers forinclusion in standard cell designs, gate arrays, or the like. Likewise,any embodiment of the present invention can also be represented as ahard macro targeted to a specific manufacturing process. For example,portions of VCO 300 (FIG. 3) may be represented as polygons assigned tolayers of an integrated circuit.

FIG. 7 shows a flowchart in accordance with various embodiments of thepresent invention. In some embodiments, method 700, or portions thereof,is performed by a voltage controlled oscillator, embodiments of whichare shown in previous figures. In other embodiments, method 700 isperformed by a frequency synthesizer, an integrated circuit, or anelectronic system. Method 700 is not limited by the particular type ofapparatus performing the method. The various actions in method 700 maybe performed in the order presented, or may be performed in a differentorder. Further, in some embodiments, some actions listed in FIG. 7 areomitted from method 700.

Method 700 is shown beginning with block 710 in which a first current isprovided to a pair of cross-coupled bipolar junction transistors. Insome embodiments, this corresponds to the operation of current source350 (FIG. 3). The magnitude of the first current may be large or small,and may be adequate to satisfy a VCO startup condition. Further, themagnitude of the first current may be inadequate to satisfy an amplitudecondition. For example, in some embodiments, the first current is justlarge enough to allow the transconductance of the bipolar junctiontransistors to overcome the loss of a tank circuit. For example,referring now back to FIG. 3, current source 350 sources a current of(a·I_(BIAS)), where I_(BIAS) is the total bias current through the tankcircuit, and the “a” multiplier represents the fraction of the totalbias current that passes through the cross-coupled bipolar junctiontransistors. In embodiments represented by FIG. 3, this fraction of thetotal bias current is equal to the first current referred to in 710.

At 720, a second current is provided to a pair of cross-coupled MOSFETtransistors. In some embodiments, this corresponds to the operation ofcurrent source 360 (FIG. 3). The magnitude of the second current may belarge or small, but in some embodiments, the magnitude of the secondcurrent is set to provide a desired output amplitude swing on nodes 304and 306 (FIG. 3). In some embodiments, the “a” multiplier in FIG. 3 isset to about 1/10. In these embodiments, 1/10 of the total bias currentis provided to the pair of cross-coupled bipolar junction transistors,and 9/10 of the total bias current is provided to the pair ofcross-coupled MOSFET transistors.

At 730, the first and second currents are summed to form a thirdcurrent, and at 740, the third current is provided to a tank circuit.This corresponds to the currents through the cross-coupled bipolarjunction transistors and the cross-coupled MOSFET transistors sum mingto form the total bias current which passes through the tank circuit asshown in FIG. 3.

Although the present invention has been described in conjunction withcertain embodiments, it is to be understood that modifications andvariations may be resorted to without departing from the spirit andscope of the invention as those skilled in the art readily understand.Such modifications and variations are considered to be within the scopeof the invention and the appended claims.

1. A voltage controlled oscillator comprising: a tank circuit; a firstpair of cross-coupled transistors to receive a first current from thetank circuit; and a second pair of cross-coupled transistors to receivea second current from the tank circuit, wherein the first and secondcurrents are unequal, and wherein the first pair of cross-coupledtransistors comprises bipolar junction transistors, and the second pairof cross-coupled transistors comprises isolated gate transistors.
 2. Thevoltage controlled oscillator of claim 1 wherein the second current isgreater than the first current.
 3. The voltage controlled oscillator ofclaim 1 wherein the first current is large enough for the cross-coupledpair of bipolar junction transistors to satisfy a startup condition ofthe voltage controlled oscillator.
 4. The voltage controlled oscillatorof claim 1 wherein the first and second pairs of cross-coupledtransistors are manufactured in a SiGe process.
 5. A voltage controlledoscillator comprising: a tank circuit; a first pair of cross-coupledtransistors to receive a first current from the tank circuit; and asecond pair of cross-coupled transistors to receive a second currentfrom the tank circuit, wherein the first and second currents areunequal, and wherein the first pair of cross-coupled transistorsexhibits a phase noise substantially proportional to current, and thesecond pair of cross-coupled transistors exhibits a phase noisesubstantially proportional to transconductance.
 6. The voltagecontrolled oscillator of claim 5 wherein the second current is largerthan the first current.
 7. The voltage controlled oscillator of claim 5wherein the second pair of cross-coupled transistors comprises fieldeffect transistors (FETs).
 8. An apparatus comprising: a first gaindevice having a first transconductance value; a first current source toprovide a first current to the first gain device; a second gain devicehaving a second transconductance value lower than the firsttransconductance value; a second current source to provide a secondcurrent to the second gain device, the second current being larger thanthe first current; and a load circuit coupled to the first and secondgain devices; wherein the first gain device comprises a cross-coupledpair of bipolar junction transistors and the second gain devicecomprises a cross-coupled pair of isolated gate transistors.
 9. Theapparatus of claim 8 wherein the load circuit comprises a tank circuit.10. An apparatus comprising: a first gain device having a firsttransconductance value; a first current source to provide a firstcurrent to the first gain device; a second gain device having a secondtransconductance value lower than the first transconductance value; asecond current source to provide a second current to the second gaindevice, the second current being larger than the first current; and aload circuit coupled to the first and second gain devices; wherein thefirst gain device exhibits a phase noise substantially proportional tothe first current and the second gain device exhibits a phase noisesubstantially proportional to the second transconductance.
 11. Afrequency synthesizer comprising: a comparison circuit to compare areference signal and a frequency divided signal; a prescaler to divide afrequency of an output signal and produce the frequency divided signal;and a voltage controlled oscillator to synthesize the output signal inresponse to the comparison circuit, the voltage controlled oscillatorincluding a cross-coupled pair of bipolar junction transistors and across-coupled pair of isolated gate transistors coupled to a tankcircuit.
 12. The frequency synthesizer of claim 11 wherein the voltagecontrolled oscillator further includes a first current source coupled tothe cross-coupled pair of bipolar junction transistors to provide afirst current, and a second current source coupled to the cross-coupledpair of isolated gate transistors to provide a second current.
 13. Thefrequency synthesizer of claim 12 wherein the second current is largerthan the first current.
 14. The frequency synthesizer of claim 12wherein the first current is sized to satisfy a startup condition of thevoltage controlled oscillator.
 15. The frequency synthesizer of claim 14wherein the second current is sized so a sum of the first and secondcurrents satisfy an output voltage condition.
 16. An electronic systemthat includes a direct conversion receiver with an oscillator inputport, a directional antenna coupled to the direct conversion receiver,and a frequency synthesizer coupled to the oscillator input port, thefrequency synthesizer comprising: a comparison circuit to compare areference signal and a frequency divided signal; a prescaler to divide afrequency of an output signal and produce the frequency divided signal;and a voltage controlled oscillator to synthesize the output signal inresponse to the comparison circuit, the voltage controlled oscillatorincluding a cross-coupled pair of bipolar junction transistors and across-coupled pair of isolated gate transistors coupled to a tankcircuit.
 17. The electronic system of claim 16 wherein the voltagecontrolled oscillator further includes a first current source coupled tothe cross-coupled pair of bipolar junction transistors to provide afirst current, and a second current source coupled to the cross-coupledpair of isolated gate transistors to provide a second current.
 18. Theelectronic system of claim 17 wherein the second current is larger thanthe first current.
 19. The electronic system of claim 17 wherein thefirst current is sized to satisfy a startup condition of the voltagecontrolled oscillator.
 20. The electronic system of claim 19 wherein thesecond current is sized so a sum of the first and second currentssatisfy an output voltage condition.
 21. A method comprising: providinga first current to a pair of cross-coupled bipolar junction transistors;providing a second current a pair of cross-coupled metal oxidesemiconductor field effect transistors; summing the first and secondcurrents to form a third current; and providing the third current to atank circuit.
 22. The method of claim 21 wherein providing a firstcurrent comprises providing an adequate current to satisfy a startupcondition.
 23. The method of claim 22 wherein the first current isinadequate to satisfy an output amplitude condition.
 24. The method ofclaim 23 wherein providing a second current comprises providing anadequate current for the third current to satisfy the output amplitudecondition.
 25. The apparatus of claim 8 wherein the second gain devicecomprises a pair of cross-coupled field effect transistors (FETs). 26.The apparatus of claim 10 wherein the first gain device comprises a pairof cross-coupled bipolar junction transistors (BJTs).
 27. The apparatusof claim 10 wherein the second gain device comprises a pair ofcross-coupled field effect transistors (FETs).